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support riscv64 target

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Signed-off-by: xermicus <cyrill@parity.io>
This commit is contained in:
xermicus
2024-07-09 17:57:58 +02:00
parent a4c4ad55dc
commit 6834751522
15 changed files with 96 additions and 16 deletions
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crates/llvm-context/src/target_machine/mod.rs
+13 -1
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@@ -20,10 +20,22 @@ pub struct TargetMachine {
impl TargetMachine {
/// The LLVM target name.
#[cfg(not(feature = "riscv-64"))]
pub const VM_TARGET_NAME: &'static str = "riscv32";
#[cfg(feature = "riscv-64")]
pub const VM_TARGET_NAME: &'static str = "riscv64";
/// The LLVM target triple.
#[cfg(not(feature = "riscv-64"))]
pub const VM_TARGET_TRIPLE: &'static str = "riscv32-unknown-unknown-elf";
#[cfg(feature = "riscv-64")]
pub const VM_TARGET_TRIPLE: &'static str = "riscv64-unknown-unknown-elf";
/// The LLVM target cpu
#[cfg(not(feature = "riscv-64"))]
pub const VM_TARGET_CPU: &'static str = "generic-rv32";
#[cfg(feature = "riscv-64")]
pub const VM_TARGET_CPU: &'static str = "generic-rv64";
/// LLVM target features.
#[cfg(feature = "riscv-zbb")]
@@ -38,7 +50,7 @@ impl TargetMachine {
.ok_or_else(|| anyhow::anyhow!("LLVM target machine `{}` not found", target.name()))?
.create_target_machine(
&inkwell::targets::TargetTriple::create(target.triple()),
"generic-rv32",
Self::VM_TARGET_CPU,
Self::VM_FEATURES,
optimizer_settings.level_back_end,
inkwell::targets::RelocMode::PIC,