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## Description Applies LLVM patches that have not been backported to the major version used in our submodule: * [LLVM PR #163679](https://github.com/llvm/llvm-project/pull/163679) * *"[RISCV] Allow large div peephole optimization for minsize"* * Fixes peephole optimization of large integers when `minsize` function attribute is set. * (Our revive codebase used a workaround that can be removed once this 500 PR is merged and we publish a new LLVM release.) * [LLVM PR #190219](https://github.com/llvm/llvm-project/pull/190219) * *"[TargetLowering] Speculative fix for a non-determinism issue between different compilers"* * Operand ordering of `mul i256` were different depending on the target ABI when building LLVM, producing different RISC-V and PVM bytecode for our Windows vs macOS/linux builds. * The bytecode divergence (yet functionally equivalent) affected Solidity contracts containing a value [multiplied by itself](https://github.com/llvm/llvm-project/issues/190148) (e.g. via explicit squaring or exponentiation), manifesting primarily when using optimization level `-O0`.
19 lines
936 B
Diff
19 lines
936 B
Diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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index e0597988e..56520d911 100644
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--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@@ -11055,10 +11055,10 @@ void TargetLowering::forceExpandMultiply(SelectionDAG &DAG, const SDLoc &dl,
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// If HiLHS and HiRHS are set, multiply them by the opposite low part and add
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// the products to Hi.
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if (HiLHS) {
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+ SDValue RHLL = DAG.getNode(ISD::MUL, dl, VT, HiRHS, LHS);
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+ SDValue RLLH = DAG.getNode(ISD::MUL, dl, VT, RHS, HiLHS);
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Hi = DAG.getNode(ISD::ADD, dl, VT, Hi,
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- DAG.getNode(ISD::ADD, dl, VT,
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- DAG.getNode(ISD::MUL, dl, VT, HiRHS, LHS),
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- DAG.getNode(ISD::MUL, dl, VT, RHS, HiLHS)));
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+ DAG.getNode(ISD::ADD, dl, VT, RHLL, RLLH));
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}
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}
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